1. Field of the Invention
The present invention relates to a digital-to-analog converter (DAC) that generates voltages useful for driving, for example, a liquid crystal to produce a vivid display.
2. Description of the Related Art
Referring to FIG. 1, a conventional DAC of the type used in a liquid crystal driving circuit to convert a six-bit digital signal to an analog voltage signal with sixty-four levels comprises a resistor string that divides a reference voltage and outputs sixty-four different voltages, and a switching circuit that selects one of the sixty-four voltages according to the value of the digital input signal.
The resistor string is a string of sixty-three resistors (R1 to R63) connected in series between a lower reference voltage VRL and an upper reference voltage VRH to form a voltage divider. Voltages V0 (=VRL), V1, V2, . . . , V63 (=VRH) at sixty-four different levels are output from the two ends and sixty-two interconnection nodes of the resistor string.
The switching circuit is a six-stage binary tree selection circuit controlled by six bits b0 to b5. Pairs of adjacent voltages V0 and V1, V2 and V3, . . . , V62 and V63 are connected to first-stage switches SW01, SW02, . . . , SW032 and one voltage in each pair is selected according to the value of the least significant bit b0; the outputs of pairs of adjacent first-stage switches SW01 and SW02, SW03 and SW04, . . . are connected to second-stage switches SW11, SW12, . . . , and one voltage from each of these pairs is selected according to the value of bit b1. Similar selections are made in sequence by third-stage switches SW21, SW22, . . . according to the value of bit b2, fourth-stage switches SW31, SW32, . . . according to the value of bit b3, and fifth-stage switches SW41, SW42, . . . according to the value of bit b4, and finally a single analog voltage corresponding to the value of the input digital input signal is selected and output as the output voltage OUT from switch SW5 according to the value of the most significant bit b5.
Japanese Patent Application Publication No. 2002-26732 discloses a k-bit two-stage nonlinear DAC having a first converter that converts the m highest bits to analog voltages, a pre-charging circuit that precharges an output load according to a selected one of these analog voltages, and a second converter that converts the n lowest bits to another analog voltage (m+n=k). This configuration is used to provide increased conversion speed for an active-matrix liquid crystal display.
A problem with the conventional DACs described above is that the number of resistors in the resistor string and the number of switches needed to select the divided voltages increase exponentially. This is a particular problem nowadays, because the increasing size of liquid crystal displays demands a gray scale with more levels for a more vivid color display. This requires an increased number of digital input signal bits, exponentially increasing the area occupied by the resistor string and switches in the DAC.
Another problem is posed by the large number of signal lines or ‘channels’ that are driven through separate switching circuits from a single resistor string. When the displayed image has a large area of a single color or gray level, hundreds of channels may be connected simultaneously to the same node in the resistor string. In such cases, the combined effect of parasitic wiring resistance or parasitic circuit elements concentrated at a single point in the resistor string can significantly distort the output voltages.
In the two-stage nonlinear DAC described above, accuracy is a particular problem near the upper and lower reference voltage levels, where the gray scale is nonlinear and the voltage differences between adjacent gray levels gradually increase, demanding a gamma correction that the second-stage converter cannot provide.